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Renesas Electronics /R7FA6M3AH /GLCDC /TCON_STVB1

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Interpret as TCON_STVB1

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (VW)VW0 (VS)VS

VS=VS, VW=VW

Description

TCON Vertical Timing Setting Register B1

Fields

VW

STVx1 second change timingSets the signal assertion width.

0 (VW): VW pixels. The valid range is 0x000 to 0x3FF.
VS

STVx1 first change timing

0 (VS): VS pixels. The valid range is 0x000 to 0x3FF.

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data